Examples of the nonvolatile semiconductor memory include nonvolatile semiconductor memories in which a unit of erasing, writing, and readout is fixed such as a nonvolatile semiconductor memory that, in storing data, once erases the data in block units and then performs writing and a nonvolatile semiconductor memory that performs writing and readout in page units in the same manner as the NAND-type flash memory.
On the other hand, a unit for a host apparatus such as a personal computer (PC) to write data in and read out the data from a secondary storage device such as a hard disk is called sector. The sector is set independently from a unit of erasing, writing, and readout of a semiconductor storage device. Normally, a size of a sector (sector size) of a host apparatus is smaller than a size of a block (block size) or a size of a page (page size) of the nonvolatile semiconductor memory.
Therefore, when the secondary storage device of the PC such as the hard disk is configured by using the nonvolatile semiconductor memory, it is necessary to write data with a small size from the PC as the host apparatus by adapting the size to the block size and the page size of the nonvolatile semiconductor memory.
The data recorded by the host apparatus such as the PC has both temporal locality and spatial locality (see, for example, Non-Patent Document 1: David A. Patterson and John L. Hennessy, “Computer Organization and Design: The Hardware/Software Interface”, Morgan Kaufmann Pub, Aug. 31, 2004). Therefore, when data is recorded, if the data is directly recorded in an address designated from the outside, rewriting, i.e., erasing processing temporally concentrates in a specific area and a bias in the number of times of erasing increases. Therefore, in the NAND-type flash memory, processing called wear leveling for equally distributing data update sections is performed. In the wear leveling processing, for example, a logical address designated by the host apparatus is translated into a physical address of the nonvolatile semiconductor memory in which the data update sections are equally distributed.
When a large-capacity secondary memory device is configured by using a NAND-type flash memory, if a unit of data management is small (for example, the page size) at the time of performing address translation, a size of a management table increases and cannot be housed in a main storage memory of a controller of the secondary memory device, thereby causing a problem in that address translation cannot be performed at a high speed. Thus, as capacity of the NAND-type flash memory as the secondary memory device increases, the size of the management table increases consequently, and thus a method of decreasing the capacity of the management table as much as possible has been desired.